1. Field of the Invention
The invention generally relates to clamp circuits. More particularly, the invention relates clamp circuits especially suitable for use in backplane applications in which a clamping function is enabled only during time periods in which overshoot is likely to be encountered, and in which other requirements (such as overvoltage tolerance and Ioff current requirements) are not sacrificed.
2. Related Art
FIG. 1 depicts a conventional circuit in which an output driver 110 drives a signal line 100 under control of a Driver Disable signal 102. A receiver 120 is connected to signal line 100. The arrangement shown in FIG. 1 may be found on each card 130 of plural cards that are inserted into a backplane, in which respective output drivers 110 may contend for control of the common signal line 100. Driver Disable signal 102 ensures that driver 110 does not attempt to drive signal line 100 when another element (not shown) has permission to drive the signal line. In this manner, contentions for control of the signal line 100 are resolved.
Especially in a backplane environment, undesirable transmission line effects such as overshoot and ringing may occur. Such undesirable effects cause received signals to take on values that may cause data errors or even circuit damage. For example, FIG. 7A shows a waveform of a conventional circuit in which a primary overshoot to 5.6 volts and a intermediate descent to 2.1 volts are experienced before a secondary overshoot to 4.2 volts. In the circuit using the technology giving rise to the illustrated diagram, the ideal steady state voltage level is 3.6 volts. It is readily appreciated that the overshoot in FIG. 7A is unacceptable for many applications, as is the intermediate descent to barely half the ideal steady state voltage level.
Thus, it is desirable that the primary overshoot, intermediate descent, and secondary overshoot be reduced in order to approach to the ideal steady state voltage more quickly and stably remain within an acceptable range around the desired steady stage voltage.
However, it is also desirable not to interfere with a signal any more than necessary to minimize transmission line effects. Accordingly, there is a need in the art to remove overshoot and related problems while minimally affecting the shape of the received waveform.
Furthermore, it is desirable that any arrangement that combats transmission line effects not sacrifice other circuit specifications. Such specifications include, for example, overvoltage tolerance and off current specifications. As understood herein, an “overvoltage tolerance specification” requires that when the received waveform takes on a voltage greater than the receiver supply voltage VCC, no circuit damage occurs and no unwanted current interferes with the received signal line 100 by passing between it and the supply voltage VCC. An “Ioff current specification” requires that if VCC=0 (that is, if the receiver is not powered) and if a non-zero voltage is applied to the receiver's input/output (I/O) port, then no circuit damage occurs and no unwanted leakage current is drawn from the signal line 100 that would affect the waveform's shape.
Clamping circuits, in general, are known in the art. For example, U.S. Pat. No. 6,396,315 (Morris) discloses clamping an output terminal of a buffer only when a buffered device is powered on, but presenting a high impedance when the buffered device is not powered on. In this manner, when an electronic device having the buffer enters an inoperable state due to device failure or power loss, yet remains physically connected to other devices, the inoperable device will not affect operation of other devices. However, Morris' arrangement does not appear to address the problem of input voltage clamping to reduce overshoot and related problems that are discussed above.
Accordingly, there is a need in the art for an arrangement that reduces overshoot and related transmission line effects while minimally affecting the waveform at times when such effects are less likely, and not sacrificing other circuit specifications such as overvoltage tolerance and Ioff current specifications.